"TRACE32 Revision History"의 두 판 사이의 차이

TRACE32
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<h2><span style="color: #999999;"><strong>April 2015</strong></span></h2>
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<p><span style="font-size: large;"><strong>New TRACE32 Feature</strong></span></p>
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<p><strong>Build Number :&nbsp; 62596&nbsp; 2015-04-27</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; HC12</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; FLASH.AUTO, FLASH.ReProgram</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; FLASH.AUTO support added for HC12 processor internal IMB flash</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :&nbsp; 61966&nbsp; 2015-04-01</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; TriCore</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Onchip.*</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; Fixed erroneous read out of on-chip trace buffer. In most cases this issue was not obvious to users. Affected devices: TC1724ED, TC1728ED, TC1791ED, TC1793ED, TC1798ED and the AURIX EDs TC26x, TC23x. Affected users are strongly advised to upgrade to latest TRACE32 version.</p>
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<p>&nbsp;</p>
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<p><strong>Build Number : 62030&nbsp; 2015-04-02</strong></p>
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<p>Architecture : ALL</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp;  Var.set, Var.*</p>
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<p>Description :&nbsp; Added support for arbitrary hexadecimal values in character constants</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.NEWLOCAL char&nbsp;&nbsp;&nbsp;&nbsp; \c</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.NEWLOCAL char[64] \s</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; *OLD T32*&nbsp;&nbsp;&nbsp; *NEW T32*&nbsp;&nbsp;&nbsp; *GCC*</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \c='x'&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c=='x'&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c=='x'&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c=='x'</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \c='\011'&nbsp;&nbsp;&nbsp; c==9&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c==9&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c==9&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (Supports for octal values)</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \c='\x9'&nbsp;&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c==9&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c==9&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (change!) New supports for hex values</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \c='\x42'&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c==0x42&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c==0x42&nbsp;&nbsp; (change!) New supports for hex values</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \c='\x'&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c=='x'&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp; (change!) Empty hex literals are now an error for characters</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \c='\z'&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; c=='z'&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp; (change!) Invalid escape seq. are now an error for characters</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \c='\x422'&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; invalid</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \c='\009'&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; invalid</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; *OLD T32*&nbsp;&nbsp;&nbsp; *NEW T32*&nbsp;&nbsp;&nbsp; *GCC*</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="yxz"&nbsp;&nbsp;&nbsp;&nbsp; s=="yxz"&nbsp;&nbsp;&nbsp;&nbsp; s=="yxz"&nbsp;&nbsp;&nbsp;&nbsp; s=="yxz"</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="y\011z"&nbsp; s=="y\tz"&nbsp;&nbsp;&nbsp; s=="y\tz"&nbsp;&nbsp;&nbsp; s=="y\tz"&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (Supports for octal values)</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="y\x9z"&nbsp;&nbsp; s=="y\x9z"&nbsp;&nbsp; s=="y\tz"&nbsp;&nbsp;&nbsp; s=="y\tz" (change!) New supports for hex values</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="y\x42z"&nbsp; s=="yx42z"&nbsp;&nbsp; s=="yBz"&nbsp;&nbsp;&nbsp;&nbsp; s=="yBz"&nbsp; (change!) New supports for hex values</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="y\xz"&nbsp;&nbsp;&nbsp; s=="yxz"&nbsp;&nbsp;&nbsp;&nbsp; s=="yxz"&nbsp;&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp;(Empty hex literals are still tolerated with strings)</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="yx\z"&nbsp;&nbsp;&nbsp; s=="yxz"&nbsp;&nbsp;&nbsp;&nbsp; s=="yxz"&nbsp;&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (Invalid escape seq. are still tolerated with strings)</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="y\x422z" s=="yx422z"&nbsp; s=="yB2z"&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp; (change!) T32 supports now hex literals</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="y\009z"&nbsp; s=="y\09z"&nbsp;&nbsp; s=="y\09z"&nbsp;&nbsp; s=="y\09z"&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (Supports for octal values. Octal values end with the first non-octal digit.)</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="y\^Iz"&nbsp;&nbsp; s=="y\tz"&nbsp;&nbsp;&nbsp; s=="y\tz"&nbsp;&nbsp;&nbsp; invalid&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (Escape sequences for caret notation are still supported)</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Var.set \s="y\^\tz"&nbsp; s=="y\tz"&nbsp;&nbsp;&nbsp; s=="y\x1Ctz" invalid&nbsp;&nbsp; (change!) Escape sequences within caret notation no longer supported</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :&nbsp; 62139&nbsp;&nbsp; 2015-04-09&nbsp;&nbsp;&nbsp;</strong>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; MSP430</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; SYm.CPU</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; New devices added, MSP430F67451A, MSP430F6745A, MSP430F67461A, MSP430F6746A,</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; MSP430F67471A, MSP430F6747A, MSP430F67481A, MSP430F6748A, MSP430F67491A,</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; MSP430F6749A</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  62130&nbsp; 2015-04-09</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; MSP430</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; SYm.CPU</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; New devices added, MSP430F6720A, MSP430F6721A, MSP430F6723A, MSP430F6724A,</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; MSP430F6725A, MSP430F6726A, MSP430F6730A, MSP430F6731A, MSP430F6733A,</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;MSP430F6734A, MSP430F6735A, MSP430F6736A</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :&nbsp; 62242&nbsp; 2015-04-14</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; Hexagon</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; SYm.Option REVision &lt;value&gt; (simulator only)</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; Allows to specify a default value for the REV regir. Applications evaluate this regir to get information about version and implemented features.</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  2015-04-14</strong></p>
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<p>Architecuture :&nbsp;&nbsp; all</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; VxWorks Awareness</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; TASK.CONFIG also intializes menu, symbol autoloader and help filter</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; Use space ids for VxWorks RTP support</p>
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<p>&nbsp;</p>
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<p><strong>Build Number : 2015-04-08</strong></p>
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<p>Architecuture :&nbsp;&nbsp; x64</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; VxWorks Awareness</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; VxWorks support for 64bit intel architecture</p>
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<p>&nbsp;</p>
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<p>Build Number :&nbsp; 2015-03-30</p>
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<p>Architecuture :&nbsp;&nbsp; ARM</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; VxWorks Awareness</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; Support for Context ID as task switch trace</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  61922&nbsp; 2015-03-10</strong></p>
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<p>Architecuture :&nbsp;&nbsp; all</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Remote API</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; new calls T32_Cmd_f() and T32_Printf()</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  62516&nbsp; 2015-04-23</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; ALL</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; IFCONFIG.ETHernetADDRESS()</p>
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<p>Description :&nbsp; &nbsp; New PRACTICE function IFCONFIG.ETHernetADDRESS()</p>
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<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;  Returns the MAC address of the PowerDebug device as a single 48-bit number if it is connected via Ethernet. Returns zero otherwise.</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :&nbsp; 62394&nbsp; 2015-04-29</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; HC12</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; all</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; support for HC12DA/DG/DT128 with LA-7736 an LA-3748</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  61580&nbsp; 2015-03-18</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; ARM</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; all</p>
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<p>Description:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; semihosting extended to support IAR compiler</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  61641&nbsp; 2015-03-20</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; x86,x64</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Data.LOAD.EXE</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; support of debug info for optimized variables from VS-2012/VS-2013</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  61945&nbsp; 2015-03-31</strong></p>
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<p>Architecture :&nbsp; &nbsp; PowerPC</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Trace</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; prestore address information in trace generated for data cycles in nexus traces</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  61946&nbsp; 2015-03-31</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; PowerPC</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Trace</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; prestore address information from trace can be used for statistics</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  61946&nbsp; 2015-03-31</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; PowerPC</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Trace</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; New commands Trace.STATistic.PAddress and Trace.STATistic.PsYmbol to analyze the prestore address</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  62017&nbsp; 2015-04-02</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; ARM</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Trace</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; prestore address information in trace always generated when available, even when ETM.DataTracePrestore is off.</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  62054&nbsp; 2015-04-06</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; all</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Trace.List</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; trace list can now handle traces with sparse trace data much better</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  62484&nbsp; 2015-04-22</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; ARM</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Data.LOAD.Elf, Frame</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp; CFA frame information from DWARF now loaded by default.</p>
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<p>&nbsp;</p>
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<p><strong>Build Number :  62579&nbsp; 2015-04-26</strong></p>
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<p>Architecture :&nbsp;&nbsp;&nbsp; all</p>
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<p>Affected Commands :&nbsp;&nbsp;&nbsp; Trace.Find, Trace.FindAll</p>
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<p>Description :&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; search for address matches now also finds cycles that are close and touch the given address only</p>
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<p>&nbsp;</p>
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<p><strong>New peripheral files:</strong></p>
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<p>perlpc43xx.per&nbsp; updated for <span style="white-space: pre;"> </span>LPC4312JBD144, LPC4312JBD144-M0, LPC4312JET100, LPC4312JET100-M0, LPC4313JBD144,</p>
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<p><span style="white-space: pre;"> </span>LPC4313JBD144-M0, LPC4313JET100, LPC4313JET100-M0, LPC4315JBD144,LPC4315JBD144-M0, LPC4315JET100,</p>
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<p><span style="white-space: pre;"> </span>LPC4315JET100-M0, LPC4317JBD144, LPC4317JBD144-M0, LPC4317JET100, LPC4317JET100-M0, LPC4322JBD144,</p>
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<p><span style="white-space: pre;"> </span>LPC4322JBD144-M0, LPC4322JET100, LPC4322JET100-M0, LPC4323JBD144, LPC4323JBD144-M0, LPC4323JET100,</p>
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<p><span style="white-space: pre;"> </span>LPC4323JET100-M0, LPC4325JBD144, LPC4325JBD144-M0, LPC4325JET100, LPC4325JET100-M0, LPC4327JBD144,</p>
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<p><span style="white-space: pre;"> </span>LPC4327JBD144-M0, LPC4327JET100, LPC4327JET100-M0, LPC4333JBD144, LPC4333JBD144-M0, LPC4333JET100,</p>
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<p><span style="white-space: pre;"> </span>LPC4333JET100-M0LPC4333JET256, LPC4333JET256-M0, LPC4337JBD144, LPC4337JBD144-M0, LPC4337JET100,</p>
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<p><span style="white-space: pre;"> </span>LPC4337JET100-M0, LPC4337JET256, LPC4337JET256-M0, LPC4353JBD208, LPC4353JBD208-M0, LPC4353JET256,</p>
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<p><span style="white-space: pre;"> </span>LPC4353JET256-M0, LPC4357JBD208, LPC4357JBD208-M0, LPC4357JET256, LPC4357JET256-M0, LPC4370FET100,</p>
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<p><span style="white-space: pre;"> </span>LPC4370FET100-M0, LPC4370FET256, LPC4370FET256-M0</p>
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<p>permb86r0x.per &nbsp; new for <span style="white-space: pre;"> </span>MB86R01, MB86R02, MB86R03</p>
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<p>pers6j32x.per &nbsp; new for <span style="white-space: pre;"> </span>6J323CKSA, S6J323CLSA, S6J324CKSA, S6J324CLSA, S6J325CKSA, S6J325CLSA, S6J326CKSA,</p>
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<p><span style="white-space: pre;"> </span>S6J326CLSA</p>
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<p>pers6j311.per &nbsp; new for 6J3118HAA, S6J3119HAA, S6J311AHAA, S6J311BJAA, S6J311CJAA, S6J311DJAA, S6J311EJAA,</p>
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<p><span style="white-space: pre;"> </span>S6J3128HAA, S6J3129HAA, S6J312AHAA</p>
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<p>perstm32f0.per &nbsp; &nbsp;updated for STM32F030C6, STM32F030C8, STM32F030F4, STM32F030K6, STM32F030R8, STM32F031C4,</p>
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<p><span style="white-space: pre;"> </span>STM32F031C6, STM32F031F4, STM32F031F6, STM32F031G4, STM32F031G6, STM32F031K4, STM32F031K6,</p>
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<p><span style="white-space: pre;"> </span>STM32F042C4, STM32F042C6, STM32F042F4, STM32F042F6, STM32F042G4, STM32F042G6, STM32F042K4,</p>
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<p><span style="white-space: pre;"> </span>STM32F042K6, STM32F042T6, STM32F050G6, STM32F071CB, STM32F071RB, STM32F071V8, STM32F071VB,</p>
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<p><span style="white-space: pre;"> </span>STM32F072C8, STM32F072CB, STM32F072R8, STM32F072RB, STM32F072V8, STM32F072VB</p>
 +
<p>&nbsp;</p>
 +
<p><strong>New order codes:</strong></p>
 +
<p><span style="white-space: pre;"> </span>LA-3888&nbsp;&nbsp;&nbsp; DXCPL Box (DAP over CAN Physical Layer)</p>
 +
<p>&nbsp;</p>
 +
<p><strong>New/updated web pages:</strong></p>
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<p><span style="white-space: pre;"> </span>New video: http://www.lauterbach.com/tut_gui.html (Introduction into TRACE32 GUI)</p>
 +
<p>&nbsp;</p>
 +
<p><strong>Other news:</strong></p>
 +
<p><span style="white-space: pre;"> </span>As required by Xilinx please do not use the Xilinx ZYNQ Flyer any more as well as any material mentioning AXI Monitor.</p>
 +
<p>&nbsp;</p>
 
<h2><strong><span style="color: #999999;">March 2015</span></strong></h2>
 
<h2><strong><span style="color: #999999;">March 2015</span></strong></h2>
 
<p><span style="font-size: large;"><strong>New TRACE32 Feature</strong></span></p>
 
<p><span style="font-size: large;"><strong>New TRACE32 Feature</strong></span></p>

2015년 7월 24일 (금) 17:32 판

April 2015

New TRACE32 Feature

Build Number :  62596  2015-04-27

Architecture :    HC12

Affected Commands :    FLASH.AUTO, FLASH.ReProgram

Description :     FLASH.AUTO support added for HC12 processor internal IMB flash

 

Build Number :  61966  2015-04-01

Architecture :    TriCore

Affected Commands :    Onchip.*

Description :     Fixed erroneous read out of on-chip trace buffer. In most cases this issue was not obvious to users. Affected devices: TC1724ED, TC1728ED, TC1791ED, TC1793ED, TC1798ED and the AURIX EDs TC26x, TC23x. Affected users are strongly advised to upgrade to latest TRACE32 version.

 

Build Number : 62030  2015-04-02

Architecture : ALL

Affected Commands :    Var.set, Var.*

Description :  Added support for arbitrary hexadecimal values in character constants

           Var.NEWLOCAL char     \c

           Var.NEWLOCAL char[64] \s

           ;                    *OLD T32*    *NEW T32*    *GCC*

           Var.set \c='x'       c

'x'������ c

'x'       c

'x'</p> <p>���������� Var.set \c='1'��� c

9         c

9�������� c

9               (Supports for octal values)

           Var.set \c='\x9'     invalid      c

9�������� c

9      (change!) New supports for hex values

           Var.set \c='\x42'    invalid      c

0x42����� c

0x42   (change!) New supports for hex values

           Var.set \c='\x'      c

'x'������ invalid����� invalid�� (change!) Empty hex literals are now an error for characters</p> <p>���������� Var.set \c='\z'����� c

'z'       invalid      invalid   (change!) Invalid escape seq. are now an error for characters

           Var.set \c='\x422'   invalid      invalid      invalid

           Var.set \c='\009'    invalid      invalid      invalid

           ;                    *OLD T32*    *NEW T32*    *GCC*

           Var.set \s="yxz"     s

"yxz"���� s

"yxz"     s

"yxz"</p> <p>���������� Var.set \s="y1z"� s

"y\tz"    s

"y\tz"��� s

"y\tz"          (Supports for octal values)

           Var.set \s="y\x9z"   s

"y\x9z"�� s<h2>"y\tz"��� s

"y\tz" (change!) New supports for hex values

���������� Var.set \s="y\x42z"� s</h2>"yx42z"   s

"yBz"���� s

"yBz"  (change!) New supports for hex values

           Var.set \s="y\xz"    s

"yxz"���� s

"yxz"     invalid            (Empty hex literals are still tolerated with strings)

           Var.set \s="yx\z"    s

"yxz"���� s

"yxz"     invalid            (Invalid escape seq. are still tolerated with strings)

           Var.set \s="y\x422z" s

"yx422z"� s

"yB2z"    invalid   (change!) T32 supports now hex literals

           Var.set \s="y\009z"  s

"yz"�� s

"y\09z"   s=="y\09z"         (Supports for octal values. Octal values end with the first non-octal digit.)

           Var.set \s="y\^Iz"   s

"y\tz"��� s

"y\tz"    invalid            (Escape sequences for caret notation are still supported)

           Var.set \s="y\^\tz"  s

"y\tz"��� s

"y\x1Ctz" invalid   (change!) Escape sequences within caret notation no longer supported

 

Build Number :  62139   2015-04-09         

Architecture :    MSP430

Affected Commands :    SYm.CPU

Description :     New devices added, MSP430F67451A, MSP430F6745A, MSP430F67461A, MSP430F6746A,

                    MSP430F67471A, MSP430F6747A, MSP430F67481A, MSP430F6748A, MSP430F67491A,

                    MSP430F6749A

 

Build Number : 62130  2015-04-09

Architecture :    MSP430

Affected Commands :    SYm.CPU

Description :     New devices added, MSP430F6720A, MSP430F6721A, MSP430F6723A, MSP430F6724A,

                        MSP430F6725A, MSP430F6726A, MSP430F6730A, MSP430F6731A, MSP430F6733A,

                        MSP430F6734A, MSP430F6735A, MSP430F6736A

 

Build Number :  62242  2015-04-14

Architecture :    Hexagon

Affected Commands :    SYm.Option REVision <value> (simulator only)

Description :     Allows to specify a default value for the REV regir. Applications evaluate this regir to get information about version and implemented features.

 

Build Number : 2015-04-14

Architecuture :   all

Affected Commands :    VxWorks Awareness

Description :     TASK.CONFIG also intializes menu, symbol autoloader and help filter

Description :     Use space ids for VxWorks RTP support

 

Build Number : 2015-04-08

Architecuture :   x64

Affected Commands :    VxWorks Awareness

Description :     VxWorks support for 64bit intel architecture

 

Build Number :  2015-03-30

Architecuture :   ARM

Affected Commands :    VxWorks Awareness

Description :     Support for Context ID as task switch trace

 

Build Number : 61922  2015-03-10

Architecuture :   all

Affected Commands :    Remote API

Description :     new calls T32_Cmd_f() and T32_Printf()

 

Build Number : 62516  2015-04-23

Architecture :    ALL

Affected Commands :    IFCONFIG.ETHernetADDRESS()

Description :    New PRACTICE function IFCONFIG.ETHernetADDRESS()

                Returns the MAC address of the PowerDebug device as a single 48-bit number if it is connected via Ethernet. Returns zero otherwise.

 

Build Number :  62394  2015-04-29

Architecture :    HC12

Affected Commands :    all

Description :     support for HC12DA/DG/DT128 with LA-7736 an LA-3748

 

Build Number : 61580  2015-03-18

Architecture :    ARM

Affected Commands :    all

Description:      semihosting extended to support IAR compiler

 

Build Number : 61641  2015-03-20

Architecture :    x86,x64

Affected Commands :    Data.LOAD.EXE

Description :     support of debug info for optimized variables from VS-2012/VS-2013

 

Build Number : 61945  2015-03-31

Architecture :    PowerPC

Affected Commands :    Trace

Description :                prestore address information in trace generated for data cycles in nexus traces

 

Build Number : 61946  2015-03-31

Architecture :    PowerPC

Affected Commands :    Trace

Description :     prestore address information from trace can be used for statistics

 

Build Number : 61946  2015-03-31

Architecture :    PowerPC

Affected Commands :    Trace

Description :     New commands Trace.STATistic.PAddress and Trace.STATistic.PsYmbol to analyze the prestore address

 

Build Number : 62017  2015-04-02

Architecture :    ARM

Affected Commands :    Trace

Description :     prestore address information in trace always generated when available, even when ETM.DataTracePrestore is off.

 

Build Number : 62054  2015-04-06

Architecture :    all

Affected Commands :    Trace.List

Description :     trace list can now handle traces with sparse trace data much better

 

Build Number : 62484  2015-04-22

Architecture :    ARM

Affected Commands :    Data.LOAD.Elf, Frame

Description :     CFA frame information from DWARF now loaded by default.

 

Build Number : 62579  2015-04-26

Architecture :    all

Affected Commands :    Trace.Find, Trace.FindAll

Description :                search for address matches now also finds cycles that are close and touch the given address only

 

New peripheral files:

perlpc43xx.per  updated for LPC4312JBD144, LPC4312JBD144-M0, LPC4312JET100, LPC4312JET100-M0, LPC4313JBD144,

LPC4313JBD144-M0, LPC4313JET100, LPC4313JET100-M0, LPC4315JBD144,LPC4315JBD144-M0, LPC4315JET100,

LPC4315JET100-M0, LPC4317JBD144, LPC4317JBD144-M0, LPC4317JET100, LPC4317JET100-M0, LPC4322JBD144,

LPC4322JBD144-M0, LPC4322JET100, LPC4322JET100-M0, LPC4323JBD144, LPC4323JBD144-M0, LPC4323JET100,

LPC4323JET100-M0, LPC4325JBD144, LPC4325JBD144-M0, LPC4325JET100, LPC4325JET100-M0, LPC4327JBD144,

LPC4327JBD144-M0, LPC4327JET100, LPC4327JET100-M0, LPC4333JBD144, LPC4333JBD144-M0, LPC4333JET100,

LPC4333JET100-M0LPC4333JET256, LPC4333JET256-M0, LPC4337JBD144, LPC4337JBD144-M0, LPC4337JET100,

LPC4337JET100-M0, LPC4337JET256, LPC4337JET256-M0, LPC4353JBD208, LPC4353JBD208-M0, LPC4353JET256,

LPC4353JET256-M0, LPC4357JBD208, LPC4357JBD208-M0, LPC4357JET256, LPC4357JET256-M0, LPC4370FET100,

LPC4370FET100-M0, LPC4370FET256, LPC4370FET256-M0

permb86r0x.per   new for MB86R01, MB86R02, MB86R03

pers6j32x.per   new for 6J323CKSA, S6J323CLSA, S6J324CKSA, S6J324CLSA, S6J325CKSA, S6J325CLSA, S6J326CKSA,

S6J326CLSA

pers6j311.per   new for 6J3118HAA, S6J3119HAA, S6J311AHAA, S6J311BJAA, S6J311CJAA, S6J311DJAA, S6J311EJAA,

S6J3128HAA, S6J3129HAA, S6J312AHAA

perstm32f0.per    updated for STM32F030C6, STM32F030C8, STM32F030F4, STM32F030K6, STM32F030R8, STM32F031C4,

STM32F031C6, STM32F031F4, STM32F031F6, STM32F031G4, STM32F031G6, STM32F031K4, STM32F031K6,

STM32F042C4, STM32F042C6, STM32F042F4, STM32F042F6, STM32F042G4, STM32F042G6, STM32F042K4,

STM32F042K6, STM32F042T6, STM32F050G6, STM32F071CB, STM32F071RB, STM32F071V8, STM32F071VB,

STM32F072C8, STM32F072CB, STM32F072R8, STM32F072RB, STM32F072V8, STM32F072VB

 

New order codes:

LA-3888    DXCPL Box (DAP over CAN Physical Layer)

 

New/updated web pages:

New video: http://www.lauterbach.com/tut_gui.html (Introduction into TRACE32 GUI)

 

Other news:

As required by Xilinx please do not use the Xilinx ZYNQ Flyer any more as well as any material mentioning AXI Monitor.

 

March 2015

New TRACE32 Feature

build number: 61531, 2015-03-17

architecture: ARMv8/ARM64

affected commands: SYStem.CPU *

description: Added support for Cortex-A72/Cortex-A53 big.LITTLE system

 

build number: 61241, 2015-03-07

architecture: ARMv8/ARM64

affected commands: SYStem.CPU *

description: Added support for Cortex-A72

 

build number: 60927, 2015-02-25

architecture: TriCore

affected commands: Trace.*

description: Added support for TC23x Emulation Devices.

 

build number: 60602, 2015-01-25

architecture: Hexagon

affected commands: frame.config.eabi [on|off]

description: New option forces the stack unwinding algorithm to follow the frame-pointer/link-register pairs.

 

build number:    60602, 2015-01-25

architecture: PowerPC

affected commands: frame.config.eabi [on|off]

description: New option forces the stack unwinding algorithm to follow the frame-pointer/link-register pairs.

 

build number:    61220, 2015-03-06

architecture: All

affected commands: MMU.COMMON, TRANS.COMMON

description: Old way of specifiying multiple COMMON address ranges with OR operation has been removed (TRANS.COMMON 0x80000000--0x8FFFFFFF||0xA0000000--0xBFFFFFFF).

Please use spaces instead of logical OR (||) to separate multiple address ranges in one command line (TRANS.COMMON 0x80000000--0x8FFFFFFF 0xA0000000--0xBFFFFFFF) or use TRANS.COMMON.ADD to specify additional address ranges

(TRANS.COMMON 0x80000000--0x8FFFFFFF    TRANS.COMMON.ADD 0xA0000000--0xBFFFFFFF). This change was necessary to prevent hard to find errors when users specify incorrect address ranges in the old implementation.

 

build number: 61090, 2015-03-03

architecture: MIPS64

affected commands: MMU.FORMAT

description: New MMU format LINUX64HTLBP16 added. Needed for Linux 2.6.32 with 16kByte page size.

 

build number: 2015-11-03

architecture: TriCore

description: New TriCore CPUs added/tested: TC297TF

 

build number: 61297, 2015-03-10

architecture: all

affected commands: Remote API

description: 64bit library for Linux

 

build number: 61394, 2015-03-13

architecture: all

affected commands: Remote API

description: Access to x64 128bit registers

 

New peripheral files:

perstm32l0.per : new for STM32L051C6, STM32L051C8, STM32L051K6, STM32L051K8, STM32L051R6, STM32L051R8, STM32L051T6, STM32L051T8, STM32L052C6, STM32L052C8, STM32L052K6, STM32L052K8, STM32L052R6, STM32L052R8, STM32L052T6, STM32L052T8, STM32L053C6, STM32L053C8, STM32L053R6, STM32L053R8, STM32L062K8, STM32L063C8, STM32L063R8

perkeystone2.per : upated for 66AK2H06, 66AK2H12, TCI6634K2K, TCI6636K2H, TCI6638K2K, 66AK2H14, 66AK2E02, 66AK2E05, AM5K2E02, AM5K2E04, TCI6630K2L

permpc830x.per : updated for MPC8306, MPC8308, MPC8309

 

Other news:

ARM Demo boards: Ready to use demos for Arm architecture downloadable.

               : EBV SoCrates with Altera CycloneV - Linux + AMP + Trace(CortexA9 SMP + Altera Nios)

               : ZedBoard with Xilinx ZYNQ-7000 - Linux + Trace (CortexA9 SMP)  

               : K70F120 with Freescale CortexM4  - uCLinux (CortexM4)

 

February 2015

New TRACE32 Feature

build number: 60491, 2015-02-10

architecture: PowerPC-64bit

affected commands: FLASH.TARGET, FLASH.CFI

description: PowerPC-64bit DualPort flash programming enabled. DualPort flash programming requires flash algorithm binary revision #3156 or newer.

 

build number: 60238, 2015-02-03

architecture: TriCore

affected commands: Trace.Timing

description: Peripheral trace (OTGB trace) added. See demo/tricore/etc/peripheraltrace for an example.

 

build number: 60314, 2015-02-04

architecture: any

affected commands: STRing.SPLIT(string,separator,element-idx)

description: Practice function to split up string at separator and return resulting part at index element-idx

 

build number: 2015-02-20

architecture: x86 / x64

affected commands: TASK.*

description: Windows 10 target OS Support for x86 and x64

 

build number: 2015-02-15

architecture: all

affected commands: LieberLieber UML Debugger

description: Integration to UML Debugger from LieberLieber

 

build number: 2015-02-01

architecture: PowerPC

affected commands: VxWorks653 Awareness

description: Support for VxWorks 653 3.0 on T2080

 

build number: 2015-02-10

architecture: PowerPC

affected commands: PikeOS Awareness

description: Confirmed support for PikeOS 3.5

 

build number: 60574, 2015-02-12

architecture: TriCore

description: New TriCore CPUs added/tested: TC233L, TC234L, TC237L, TC267D*, TC26*C

 

build number: 2015-02-25

architecture: TriCore

description: TriCore AURIX demo scripts updated (especially AMP demo).

 

build number: 59233, 2014-12-17

architecture:  PowerPC64bit

description: Updated cache predecodings for e6500 cores

 

build number: 59306, 2014-12-19

description: Synch window adaptions: Display port from the current T32 instance, clarify if this instance is connected to another one

 

build number: 59507, 2015-01-08

architecture: PowerPC64bit

description: AMP synchronous assembler step improvements

 

build number: 59561, 2015-01-12

architecture: PowerPC64bit

description: Official support for T2080 and T2040, Core Rev.1 and 2

 

build number: 59668, 2015-01-14

architecture: PowerPC64bit

description: Support AltiVec unit (VPU) for e6500 cores

 

build number: 59991, 2015-01-23

architecture: PowerPC and PowerPC64bit

description: Add support for traceenable breakpoint ranges for all QorIQ CPUs

 

build number: 60349, 2015-02-05

architecture: PowerPC64bit

description: DDR trace implementation for T10xx CPUs, filtering just allows masks

 

build number: 60695, 2015-02-16

architecture: PowerPC and PowerPC64bit

description: Finished speed optimizations for target read/write accesses, PowerPC64bit speedup load of large files when l2 cache is enabled

 

build number: 60756, 2015-02-18

architecture: PowerPC64bit

description: Enable L2 cache support for all T20xx revisions

 

build number: 60999, 2015-02-27

architecture:     RL78

description:      new sub-family RL78-I1D added

 

New peripheral files:

pertc27x.per : updated for TC27x C-step, TC27x D-step

perfcr4.per : updated for MB9EF226

pertc23x.per : updated for TC21x, TC22x, TC23x

peratsamd21.per  new for ATSAMD21E15A, ATSAMD21E16A, ATSAMD21E17A, ATSAMD21E18A, ATSAMD21G15A, ATSAMD21G16A, ATSAMD21G17A, ATSAMD21G18A, ATSAMD21J15A, ATSAMD21J16A, ATSAMD21J17A, ATSAMD21J18A

 

New/updated FLASH support:

PowerPC-64bit : updated flash algorithms to support DualPort flash programming on 32-bit flash address range

TI AM3359(BeagleBone black) : eMMC support

MPC5645 : Quad SPI flash support

T2080 : SPI flash support

Kinetis(K70F120): NAND/eMMC flash support

Quatro43xx : NAND flash support

changed the directory for the "find_nanddef & find_spidef.cmm" to the "~~/demo/etc/flash/"

 

New/updated web pages:

3. PRACTICE Tutorial "Subroutines in PRACTICE" will be available under http://www.lauterbach.com/tut_practice.html by Wednesday March 4th

 


January 2015

New TRACE32 Feature

Build Number 60096, 01/2015

Architecture : 78K0R / RL78

Description :  POWER DEBUG PRO supports 78K0R and RL78.

 

Build Number 01/2015

Architecture : PowerPC, TriCore, all if adapted accordingly

Description :  New zip-file of TRACE32 Integration for Simulink, incl. PIL, in addition complete demo bundle with demo models and trail version

                     of TRACE32, available for download at www.lauterbach.com/intsimulink.html , redesign of website with lots of infos

Architecture : ARM

Affected commands : TPIU.SWVPrescaler <value>

Description : The new command affects the ARM Serial Wire Output (SWV) baud rate. It replaces the old TPIU.PortMode NRZ/2 to NRZ/4.

                    Now you select only NRZ and set the prescaler by the new command, which allows a much more wider spectrum of diffent baudrates.

 

Build Number 2015-01-21

Architecture : all

Affected commands : VERSION.SERIAL.NEXUS(), VERSION.SERIAL.POWERPROBE(), VERSION.SERIAL.Integrator()

Description : New PRACTICE functions, to read serial numbers of Lauterbach hardware:

                  VERSION.SERIAL.NEXUS()      Returns the first serial number of your Nexus Adapter. If no Nexus Adapter is plugged it returns the serial number of your

                  trace preprocessor if available.

                  VERSION.SERIAL.POWERPROBE() Returns the serial number of your PowerProbe logic analyzer if available

                  VERSION.SERIAL.Integrator() Returns the serial number of your PowerIntegrator or PowerIntegrator-II logic analyzer

 

Build Number 01/2015

Architecture : all

Affected commands : COVerage.MAP

Description :  Added a new command. COVerage.MAP maps the code coverage information from a source range to a destination range.

 

Architecture : all

Affected commands : WinPrint

Description :  Added a new file type "XML". May need additional testing due to the way our windows are implemented.

 

Build Number 2015-01-22

Architecture : MicroBlaze

Affected commands : JTAG.LAODBIT

Description :  Support for configuration of Xilinx FPGAs including 7series family. Speed up by factor of 8x-10x.

 

Build Number 2014-12-12

Architecture : PowerPC

Affected commands : VxWorks Awareness

Description :      Confirmed support for VxWorks 7

 

Build Number 2015-01-16

Architecture : ARM

Affected commands : MQX Awareness

Description :      Support Task Context on Cortex-A

 

 

Build Number 2015-01-01

Architecture : all

Affected commands : Trace.REF

Description : Reference record also contains exact time information of selection (and not just the time of the record).

 

Build Number 59425, 2015-01-03

Architecture : all

Affected commands : List, SETUP.DIS

Description : List window can show bookmark contents as comment in disassembler.

 

Build Number 59432, 2015-01-05

Architecture : all

Affected commands : List, ISTAT

Description :  ISTAT analysis can show which instructions where hit by interrupts or exceptions.

 

Build Number 59433, 2015-01-05

Architecture : x86,x64

Affected commands : Data.LOAD.ELF

Description : Memory access changed - will now use logical memory access when load is not done to a physical address.

 

Build Number 59483, 2015-01-08

Architecture : ARM

Affected commands : Break

Description : Onchip breakpoints are now secure/nonsecure/hypervisor aware when SYStem.Option ZoneSPACES is enabled.

 

Build Number 59639, 2015-01-13

Architecture : all

Affected commands : Data.PROLOG/Data.EPILOG/Data.SOFTPROLOG/Data.SOFTEPILOG/Data.STARTUP/Data.TIMER/FLASH.PROLOG/FLASH.EPILOG

Description :  Sequences can be supplied for each core in an SMP system.

 

Build Number 59653, 2015-01-14

Architecture : Coldfire V2/V3

Affected commands : Break.Set

Description :  TraceTrigger breakpoints supported.

 

Build Number 59694, 2015-01-15

Architecture : all

Affected commands : Data.LOAD.ELF

Description :  RELOC AFTER algorithm changed to also consider alignment of section. RELOC AFTERALIGN provides override.

 

Build Number 59736, 2015-01-16

Architecture : ARM ETMv1, ARM ETMv3

Affected commands : ETM.DataTracePrestore

Description : "Analyzer.Mode Prestore" removed. Functionality extended (like on ICE) and moved to ETM.DataTracePrestore.

 

 

Build Number 60021, 2015-01-26

Architecture : all

Affected commands : Var.Set

Description :  C/C++ expression parser extended to support scaled assignment (e.g. for ASAP file format).

 

New peripheral files:

pers6j320.per      new for S6J320CQX

percn78xx.per      new for CN78XX

peratsamr21.per    new for ATSAMR21E16A, ATSAMR21E17A, ATSAMR21E18A, ATSAMR21G16A, ATSAMR21G17A, ATSAMR21G18A

perspc58ne.per     updated for SPC58NE84

permsp430f5xxx.per updated for MSP430

 

New/updated FLASH support:

-emmc : TI DM365 series support (omap-l138,am18xx, dm365 ...)

-nand : 4KB page size supports for TI gpmi NAND controller

 

 

December. 2014

New TRACE32 Feature

Build Number 2014-12

Architecture : ALL

Affected commands : New respectively renamed commands Trace.STATistic.INTERRUPT, Trace.STATistic.TASKORINTERRUPT, Trace.STATIistic.TASKVSINTERRUPT

Description : Commands to analyze interrupt timing

 

Build Number 2014-12

Architecture : MPC, ARM

Affected commands : PERF.STREAM ON

Description :      PC sampling is done by software running in the debugger hardware, instead of host software

                    Less intrusive, more samples per second

 

Build Number 2014-12

Architecture : ARM

Affected commands : SYStem.CONFIG PortSHaRing ON|OFF

Description : Port sharing with other calibration (like the ETAS ETK) tools is now officially supported for ARM.

 

Build Number 2014-12

Architecture : ALL

Affected commands : none

Description :      t32mciserver can stay alive after the last T32 quits and keep connection to debug port by option "keepalive". t32mciserver can be shut down by CTRL-C or Signal.

 

Build Number 2014-12

Architecture : ALL

Affected commands : SYStem.PAUSE <time> /Target

Description : The command is similar to "wait <time>", but it executes the pause at the debug box or in the emulation / simulation.

 

Build Number 2014-12

Architecture : ALL

Affected commands : SYStem.CONFIG.FAKEANALYZER <on/off>

Description :      The command enables the Analyzer parse path when no Analyzer is present to allow to configure the on-chip peripherals to be programmed to create trace signals at the trace ports.

 

Build Number 2014-12

Architecture : ALL

Affected commands : SYStem.Polling , <stopped mode>

Description :      extend system.polling command to change the behavior when the CPU is stopped and the CPU is polled. "SYStem.Polling , OFF" can speed up TRACE32 in emulation/simulations because no polling is done when the CPU is stopped.

 

Build Number 2014-11-26

Architecture : ARM

Affected commands : PikeOS Awareness

Description :      Support for "System Extensions"

 

Build Number 2014-11-28

Architecture : all

Affected commands : QNX Awareness, TASK.PIDIN PMEM/MEM

Description : Display of process memory maps

 

Build Number 2014-12

Architecture : x86/x64

Affected commands : WinSTD Awareness

Description :      Win7 and Win8 (64 and 32bit) now supported by the awareness

 

Build Number 2014-11-19

Architecture : S12/S12X/S12Z: Automated CPU detection at SYStem.Up

Affected commands :      -

Description : Use SYStem.CPU MCS12Z for S12Z devices

 

New peripheral files:

perk50.per MK50D series

perk60.per MK60D series 

perk70.per MK70D series

pert2xxx.per  new for T2080

 

New/updated FLASH support:

Build Number 2014-12-04

Architecture : S12Z: MCS12ZVL32 based derivatives

Description :      Support for derivatives with small onchip RAM

 

New/updated web pages:

-The homepage about CombiProbe (cobstm.html) has been detached by CombiProbe ARM

http://www.lauterbach.com/cobarm.html

 

-The homepages about PowerDebug Ethernet and PowerDebug II have been detached by PowerDebug PRO:

http://www.lauterbach.com/powerdebugpro.html

 

-The homepage about PowerTrace has been detached by PowerTrace PX:

http://www.lauterbach.com/powertracepx.html

 

Other news:

-Our next PRACTICE Tutorial is available. In the second Tutorial Linda tells something about the Conditional Execution in PRACTICE:

http://www.lauterbach.com/frames.html?tut_practice.html

 

-Lauterbach can now be found on YouTube. This is the Lauterbach YouTube Channel:

http://www.youtube.com/user/lauterbachgmbh

 

 

November. 2014

New TRACE32 Feature

Build Number 58496, 2014-11-21

Architecture :  MicroBlaze

Description :      Support for MicroBlaze V9.5.

 

Build Number 57957, 2014-11-05

Architecture : ARM64

Description :      Added changes to support ARM Versatile Express Juno board.

 

Build Number 58358, 2014-11-18

Architecture : Star12Z

Affected commands : FLASH

Description :      Flash programming support added for MCS12Z derivatives with small RAM size, like MCS12ZVL32

 

Build Number 58169, 2014-11-12

Architecture :  ALL

Affected commands : PSTEPOUT

Description :      The new PRACTICE debugging command PSTEPOUT was added to enable a new stepping out functionality.

                    It is possible to step out from a deeper block up to the higher DO or GOSUB PRACTICE stack element.

                    The functionality was integrated in form of a local button to the windows PLIST, PSTEP and PMACRO.

 

Build Number 58374, 2014-11-18

Architecture : ALL

Affected commands : TRACE.EXPORT.TASKEVENTS

Description :      print out the core number message on the SMP systems

 

Build Number 58288, 2014-11-14

Architecture : ALL

Affected commands : FLASHFILE

Description :      flashfile commands support for ARMv8 (arm64)

 

Build Number 2014-11-12

Architecuture :   PowerPC

Affected commands : embOS Awareness

Description :      embOS Awareness extended to PowerPC

 

Build Number 2014-11-14

Architecuture :   ARM, ARM64

Affected commands : UEFI TianoCore

Description :      Documentation for TianoCore on ARM

 

New peripheral files:

 

perk10.per  for MK10D series      

perk20.per  for MK20D series

perk30.per  for MK30D series

perk40.per  for MK40D series

perspc574sxx.per  updated for SPC574Sxx

perspear1380.per  new file added for: SPEAR1380

peratsama5.per    updated for ATSAMA5D36

 

 

New/updated FLASH support:

-apm88xx0x : new SPI flash support

-armada38x : new NAND flash support

-nand: support MT29F8G08ABAC( Micron, nand8g08xs224 type (4KB/224B) )



Octover. 2014

New TRACE32 Feature

Build Number 56530, 2014-09-17

- Architecture : BLACKFIN

- Support DAP, and access the coresight components

 

Build Number 56230, 2014-09-05

- Architecture : ALL

- Affected commands : Trace.EXPORT.CSVFunc

- Export traced function entry/exit and task switch information as a CSV format.                      

 

Build Number 56629, 2014-09-23

- Architecture : ARM

- New access class M: introduced to access data in context of monitor mode / EL3

 

Build Version 2014-07-30

- Architecture : x64

- Affected commands : UEFI Awareness

- Support Intel BLDK 64bit

 

Build Version 2014-08-06

- Architecture : all

- Affected commands : ThreadX TASK.THread

- Added sorting with /SORTup and /SORTDOWN option

 

Build Version 2014-08-08

- Architecture : all

- Affected commands : FreeRTOS TASK.TaskList

- Added sorting by clicking on column header

 

Build Version 2014-08-13

- Architecture : ARM

- Affected commands : NutOS Awareness

- Basic support for NutOS (no documentation)

 

Build Version 2014-08-18

- Architecture : ARM

- Affected commands :    NuttX Awareness

- Basic support for NuttX (no documentation)

 

Build Number 55852, 2014-08-20

- Architecture : all

- Affected commands>: Task.STacK.view

- New option /HumanReadable

 

Build Version 2014-08-27

- Architecture : all

- Affected commands : Remote API

- API Call Log to file

 

New/updated FLASH support:

Microblaze-SPI  new, support little endian controller

Kinetis MKE02, MKE06, MKV10     new, processor internal

Atmel ATSAM4C                        new, processor internal

 

New/updated web pages

Now available: Tutorials Debugging PRACTICE by Linda Bahloul - the first Tutorial is online now!

http://www.lauterbach.com/tut_practice.html

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